Little Boxes

Previous research dabblings

A few of the areas I made preliminary investigations into during the early stages of my research were subsequently dropped. The following sections contain the random and possibly useful links I accumulated during that period.

VHDL hackery

A couple of vaguely promising AVR core designs:

RiscMCU – A cut-down clone of the AT90S1200.

Quartus dislikes the non-synchronous RAM used in this project and manages to break some of the skip unit logic too. Still, the pipeline is pretty straightforward so the design may be fixable.

pAVR (follow the link to "ASIC design") – A souped up generic AVR with configurable memory sizes.

This design is somewhat over-engineered, using a six-stage pipeline for an eight-bit processor. Quartus should compile the development version with only one minor alteration, though I haven't been brave enough to try simulating anything on it. The documentation release of the source is newer, incomplete, and breaks in Quartus. This is, needless to say, not encouraging.

(If anyone has anything better that'll synthesize for Altera Cyclone without too many headaches, please shout.)

And two handy VHDL references:

Accolade VHDL Reference Guide

A good reference with tutorial sections and examples, but limited to Internet Exploder only.

VHDL Manual by the University of Ulm Department of Microelectronics

A concise reference with some of the odder syntax in.

Windows Workflow Foundation

Just a few links to introductory material:

• Microsoft's main page on the subject.
• The Developer Walkthrough.