Dr. Terrence Mak

Email: tmak@ecs.soton.ac.uk
Departmental web address: www.ecs.soton.ac.uk/people/tsm3g15
Office address: Building 59/4219, Department of Electronics and Computer Science, University of Southampton, SO17 1BJ, United Kingdom

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Invited Speakers: www.ecs.soton.ac.uk/people/tsm3g15/visitors_2017.html
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Education

• Imperial College London, UK, 2005 - 2009
  PhD in Electrical and Electronic Engineering, co-supervised by Prof. Peter Cheung and Prof. Wayne Luk
  Thesis: Circuit Design and Analysis for On-Chip Communication Systems
• The Chinese University of Hong Kong, Hong Kong, 2000 - 2005
  BEng and MPhil in Systems Engineering and Engineering Management, supervised by Prof. Kai-Pui Lam
  Thesis: High-Performance Reconfigurable Computing for Biomedical Applications
  

Previous and Current Appointments

• Associate Professor, Department of Electronics and Computer Science, University of Southampton, UK, 9/2015 – now
• Assistant Professor, Department of Computer Science and Engineering, The Chinese University of Hong Kong, Hong Kong 9/2012 – 8/2015
• Lecturer, School of Electrical, Electronic and Computer Engineering (EECE), Newcastle University, UK, 3/2010 – 8/2012
• Affiliated Lecturer, Institute of Neuroscience (IoN), Newcastle Biomedicine, Newcastle University, UK, 8/2010 – 8/2012
• Visiting Scientist (supported by the Royal Society), Harvard-MIT Health Sciences and Technology, Massachusetts Institute of Technology, USA, 8/2011-11/2011
• Research Scientist, Oracle Lab (previously called Sun Microsystems Laboratories), Menlo Park, USA, working with Dr. Ian W. Jones and Prof. Ivan Sutherland, 2008-2009

Teaching (Since 2015)

• Advanced Computer Architecture – ELEC3219, University of Southampton, 2015-Now
  
• SoC Design (Project) – ELEC6235, University of Southampton, 2015-Now
  
• VLSI Design (Project) – ELEC6231, University of Southampton, 2015-Now
  

Research Interests

• Many-core architecture and systems design (Networks-on-chip, 3D-VLSI, FPGA, chip multi-processors)
  
• Optimisation for computing (embedded systems, big data, low-power systems)
  
• Biomedical systems (brain-machine interface, mimicking from neurons to the brain, closed-loop systems)

Peer-reviewed Journal Publications

• X. Wang, Y. Tao, M. Yang, H. Li, T. Mak, HRC: A 3D NoC Architecture with Genuine Support for Runtime Thermal-aware Task Management, IEEE Transactions on Computers, 2017 (to appear)
  
• S. Yang, K. Wong, J. Andrew, T. Mak, M. McGinnity, A Neuro-inspired Visual Tracking Method Based on Programmable System-on-chip Platform, Neural Computing and Applications (NCAA), 2017 (to appear)
  
• R. Al-Dujally, A. Li, R. Maunder, T. Mak, B. Al-Hashimi, L. Hanzo, A Scalable Turbo Decoding Algorithm for High-Throughput Network-on-Chip Implementation, IEEE Access, 2016 (to appear)
  
• L. Wang and T. Mak, A Fault-Tolerant Routing Algorithm Using Tunnels in Faulty Blocks, Journal of Circuits, Systems and Computers, 2016 (to appear)
  
• M. Opoku Agyeman, Q.-T. Vien, A. Ahmadinia, A. Yakovlev, K.-F. Tong and T. Mak, A resilient 2-D waveguide communication fabric for hybrid wired-wireless NoC design, IEEE Transactions on Parallel and Distributed Systems, 2016 (to appear)
  
• Ammar Karkar, Terrence Mak, Kenneth Tong, Alex Yakovlev, Network-on-Chip Multicast Architectures Using Hybrid Wire and Surface-Wave Interconnects, IEEE Transactions on Emerging Topics in Computing, 2016 (to appear)
  
• J. Ng, A. Singh, X. Wang, T. Mak, Defragmentation for Efficient Runtime Resource Management in NoC-based Many-core Systems, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2016 (to appear)
  
• X Wang, B Zhao, L Wang, T Mak, M Yang, Y Jiang, M Daneshtalab, A pareto-optimal runtime power budgeting scheme for many-core systems, Microprocessors and Microsystems, 2016 (to appear)
  
• T Fei, X Wang, B Zhang, T Mak, On Runtime Adaptive Tile Defragmentation for Resource Management in Many-core Systems, Microprocessors and Microsystems, 2016 (to appear)
  
• A Karkar, T Mak, KF Tong, A Yakovlev, A Survey of Emerging Interconnects for On-Chip Efficient Multicast and Broadcast in Many-Cores, IEEE Circuits and Systems Magazine, 16(1), 58-72, 2016
  
• X Wang, B Zhao, T Mak, M Yang, Y Jiang, M Daneshtalab, On Fine-Grained Runtime Power Budgeting for Networks-on-Chip Systems, IEEE Trans. Computers, 2016 (to appear)
  
• Q. Liu, W. Ji, Q. Chen, T. Mak, IP Protection of Mesh NoCs Using Square Spiral Routing, IEEE Trans. VLSI, 24(4), 1560-1573, 2015
  
• MO Agyeman, K Tong, T Mak, An Improved Wireless Communication Fabric for Emerging Network-on-Chip Design, Procedia Computer Science 56, 415-420, 2015
  
• W. Yi, K. Lo, T. Mak, K. Leung, Y. Leung, H. Meng, A Survey of Wireless Sensor Network Based Air Pollution Monitoring Systems, Sensors 15 (12), 31392-31427, 2015
  
• X Wang, B Zhao, T Mak, M Yang, Y Jiang, M Daneshtalab, An efficient runtime power allocation scheme for many-core systems inspired from auction theory, Integration, the VLSI Journal 50, 147-157, 2015
  
• R. Luo, G. Coapes, T. Mak, Y. Tadashi, P. Degena, C. Tin, Real-Time Simulation of Passage-of-Time Encoding in Cerebellum Uisng a Scalable FPGA-based System, (to appear) IEEE Trans. Biomedical Circuits and Systems, 2015
  
• Special Issue on Emerging On-Chip Networks and Architectures, Guest Editors: Terrence Mak, Maurizio Palesi, Masoud Daneshtalab, Computer and Electrical Journal, 2015, M. Yang, Y. Jiang, M. Daneshtalab, Terrence Mak
  
• Qiang Liu, Terrence Mak, Tao Zhang, Xinyu Niu, Wayne Luk, Alex Yakovlev, Power Adaptive Computing System Design for Solar Energy Powered Embedded Systems, (to appear) IEEE Trans. VLSI Systems, 2014
  
• Nizar Dehir, Terrence Mak, Fei Xia, Alex Yakovlev, Modelling and Tools for Power Supply Variation Analysis in Networks-on-Chip, IEEE Trans. Computers, vol. 63, no. 3, pp. 679-690, 2014
  
• Ghaith Tarawneh, Alex Yakovlev, Terrence Mak, Eliminating Synchronization Latency using Sequenced Latching, IEEE Trans. VLSI Systems, vol. 22, no. 2, pp. 408-419, 2014
  
• Xiaohang Wang, Terrence Mak, M. Yang, Y. Jiang, M. Daneshtalab, M. Palesi, On Self-Tuning Networks-on- Chip for Dynamic Network-Flow Dominance Adaption, ACM Transactions on Embedded Computing Systems, vol. 13, no. 2, pp. 73-78, 2014
  
• Nizar Dehir, Raaed Al-Dujaily, Terrence Mak, Alex Yakovlev, Thermal Optimization in 3D Network-on-Chip Based CMPs Using Dynamic Programming Networks, ACM Transactions on Embedded Computing Systems, vol. 13, no. 4, pp. 139-155, 2014
  
• Special Issue on Emerging On-Chip Networks and Architectures, Guest Editors: Terrence Mak, Maurizio Palesi, Masoud Daneshtalab, IET Computers & Digital Techniques, 2013
  
• Ammar Karkar,Janice Turner,Kenneth Tong,Terrence Mak, Alex Yakovlev, Xia Fei, Novel Hybrid Wire-Surface Wave Interconnects for Next Generation Networks-on-Chip, IET Computers & Digital Techniques, vol. 7, no. 6, pp. 294-303, 2013
  
• Raaed Al-Dujaily, Nizar Dehir, Terrence Mak, Alex Yakovlev, Dynamic Programming-based Runtime Thermal Management (DPRTM): An On-line Thermal Control Strategy for 3D-NoC Systems, ACM Transactions on Design Automation of Electronic Systems, vol. 19, no. 1, pp. 1-12, 2013
  
• Xiaohang Wang, M. Yang, Y. Jiang, M. Daneshtalab, M. Palesi, P. Liu, T. Mak, N. Nagherzadeh, Efficient Multicasting Schemes for 3-D Networks-on-Chip, Journal of Systems Architecture, vol. 59, no. 9, pp. 693-708, 2013
  
• Nizar Dehir, Raaed Al-Dujaily, Terrence Mak, Alex Yakovlev, Highly Adaptive and Deadlock-Free Routing for 3D Networks-on-Chip, IET Computers & Digital Techniques, vol. 7, no. 6, pp. 255-263, 2013
  
• Hui Dong, Le-Tian Huang, Jun-Shi Wang, Terrence Mak, Combining Task Scheduling in Power Adaptive Dynamic Reconfigurable System, Journal of Electronic Science and Technology: Special Issue on Green Technologies Energy-Efficient Circuits, Systems and Devices, vol. 10, no. 4, pp. 296-301, 2013
  
• Jun-Shi Wang, Le-Tian Huang, Hui-Dong, Terrence Mak, Estimating Power for FPGAs Based on Signal Probability Theory, Journal of Electronic Science and Technology: Special Issue on Green Technologies Energy-Efficient Circuits, Systems and Devices, vol. 10, no. 4, pp. 302-308, 2013
  
• Terrence Mak, Energy Harvesting Systems for Green Computing, Journal of Electronic Science and Technology: Special Issue on Green Technologies Energy-Efficient Circuits, Systems and Devices, vol. 10, no. 4, pp.291-295, 2013
  
• Bo Yu, H. M. Chan, Terrence Mak, Y. Sun, Chi-Sang Poon, On-Chip Systolic Networks for Real-Time Tracking of Pairwise Correlation Between Neurons in Large-Scale Networks, IEEE Trans. Biomedical Engineering, vol. 60, no. 1, pp. 198-202, 2013
  
• Raaed Al-Dujaily, Terrence Mak, Kai-Pui Lam, Fei Xia, Alex Yakovlev, Chi-Sang Poon, Dynamic On-Chip Thermal Optimization for Three Dimensional Networks-on-Chip, The Computer Journal, vol. 55, no. 10, pp.1-15, 2012
  
• Bo Yu, Terrence Mak, Xiangyu Li, Leslie Smith, Yihe Sun and Chi-Sang Poon, Stream-based Hebbian Eigenfilter for Real-Time Neuronal Spike Discrimination, BioMedical Engineering OnLine, vol. 11, no. 18, 2012
  
• Bo Yu, Terrence Mak, Xiangyu Li, Fei Xia, Alex Yakovlev, Yihe Sun, Chi-Sang Poon, Reconfigurable Hebbian Eigenfilter for Multichannel Spike Discrimination, IEEE Journal on Emerging and Selected Topics in Circuits and Systems, vol. 1, no. 4, pp. 502-515, 2012
  
• Raaed Al-Dujaily, Terrence Mak, Fei Xia, Alex Yakovlev and Maurizio Palesi, Embedded Transitive Closure Networks for Run-Time Deadlock Detection in Networks-on-Chip, IEEE Trans. Parallel and Distributed Systems, vol. 23, no. 7, pp. 1205-1215, 2012
  
• Terrence Mak, Truncation Error Analysis of MTBF Computation for Multi-Latch Synchronisers, Elsevier, Microelectronics Journal, vol. 43, no. 2, pp. 160-163, 2012
  
• Terrence Mak, Chi-Sang Poon, Special Issue: 3-D VLSI Systems Integration, The Computer Journal, 2011
  
• Terrence Mak, Raaed Al-Dujaily, Kuan Zhou, Kai-Pui Lam, Chi-Sang Poon, 3-D On-Chip Dynamic Programming Network Using TSV-based Technology, IEEE Circuits and Systems Magazine, vol. 11, no. 3, pp. 51-62, 2011
  
• Terrence Mak, Kai-Pui Lam, Peter Y.K. Cheung, Wayne Luk, Adaptive Routing for Network-on-Chips Using a Dynamic Programming Network, IEEE Trans. Industrial Electronics, vol 58, no. 8, pp. 3701-3716, 2011
  
• Terrence Mak, Kai-Pui Lam, H.S. Ng, Guy Rachmuth, Chi-Sang Poon, A CMOS Current-Mode Dynamic Programming Circuit, IEEE Trans. Circuits and Systems I, vol 57, no. 22, pp. 3112-3123, 2010
  
• Terrence Mak, Pete Sedcole, Peter Y.K. Cheung, Wayne Luk, Global Communication in FPGAs Using Wave-Pipelined Signalling, Integration, the VLSI Journal, vol. 43, no. 2, pp. 188-201, 2010
  
• Terrence Mak, Pete Sedcole, Peter Y.K. Cheung and Wayne Luk, Average Interconnections Delay Estimation for On-FPGA Communication Links, IET Electronics Letters, vol. 43, no. 17, pp. 918-920, 2007
  
• Terrence Mak, G. Rachmuth, K.P. Lam, and C-S. Poon, A Component-based FPGA Design Framework for Neuronal Ion Channel Dynamics Simulations, IEEE Trans. Neural Systems & Rehabilitation Engineering, vol. 14, no. 4, pp. 410-418, 2006
  
• Terrence Mak, K. P. Lam, Equivalence - Set Genes Partitioning Using an Evolutionary - DP Approach, IEEE Trans. NanoBioscience, vol. 4, no. 4, pp. 295-300, 2005

International Conferences and Workshops

• Please find the list of conference publications at Google Scholars.

Awards

• Best Paper Award, IEEE International Conference on Embedded and Ubiquitous Computing, 2016
• Top 25 Downloads Manuscript, IEEE Transactions on VLSI Systems, 2015
• The Prestigious IET Premium Award for Computers & Digital Techniques, 2015
• Best Paper Award (Only one selected from special sessions), 23rd Euromicro International Conference on Parallel, Distributed and Network-based Processing, PDP’15, 2015
• Best Paper Award (Only one selected), ACM/IEEE International Conference on VLSI-SoC, Oct 2014
• Croucher Foundation Start-up Fund, 2012
• One-Thousand-Youth-Research Programme Award, National Science Foundation of China (NSFC), 2012
• Distinguished Alumni, Engineering Faculty, The Chinese University of Hong Kong, 2011
• Best Paper Award (Only one selected out of 800 papers), ACM/IEEE International Conference on Design, Automation and Test in Europe (DATE), April 2011
• Croucher Foundation Scholarship (full support for my Ph.D study at Imperial College London, valued at approximately £100,000), 2005-2008
• US Office of Naval Research/IEEE Excellence in Neural Engineering Award, 2005

Current Research Grants and Funding Supports (since 2016)

• PI, Cost effective 3D-IC design methodology for heterogeneous technology Internet-of-Things systems - EPSRC (Industrial CASE award) and the Industrial sponsor (ARM), 2016-2020
  
• Co-I, Event-based parallel computing – partial ordered event-triggered systems (POETS), EP/N031768/1, 2016-2021
  

Current Postgraduate Students

• Mr. Qian Ding, PhD student, Department of Electronics and Computer Science, University of Southampton, 2016-present
  
• Mr. Benjamin Fletcher, PhD student, Department of Electronics and Computer Science, University of Southampton, 2016-present
  
• Ms. Bi Jia, PhD student, Department of Electronics and Computer Science, University of Southampton, 2015-present
  
• Mr. Tom Ming, PhD student, Department of Computer Science and Engineering, The Chinese University of Hong Kong, 2014-present, Co-supervise with Prof. KS Leung and Prof. Yee Leung
  
• Mr. Tony Wei-Ying Yi, PhD student, Department of Computer Science and Engineering, The Chinese University of Hong Kong, 2014-present, Co-supervise with Prof. KS Leung and Prof. Yee Leung
  
• Mr. Liang Wang, PhD student, Department of Computer Science and Engineering, The Chinese University of Hong Kong, 2013-present, Co-supervise with Prof. HF Leung
  
• Mr. Wen Zong, PhD student, Department of Computer Science and Engineering, The Chinese University of Hong Kong, 2012-present
  

Previous Postgraduates and Post-doc Researchers

• Dr. Michael Opoku Agyeman, Post-doc researcher (2014-2015), working at University of Northampton as a Lecturer
  
• Dr. Xiaohang Wang, Post-doc researcher (2012-2015), working at South China University of Technology as an Associate Professor
  
• Mr. Jim Ng, MPhil (2013-2015), working at Hong Kong Cathay Pacific
  
• Ms. Sarah Siu, MPhil (2013-2015), working at HSBC
  
• Dr. Raaed Al-Dujaily, PhD (2010-2013), working at a Canadian software company
  
• Dr. Bo Yu, PhD (2010-2013), working at Baidu.com as a hardware engineer
  
• Dr. Nizar Dehir, PhD (2011-2014), at York University as a post-doc
  
• Dr. Ammar Karkar, PhD (2012-2016), working at Newcastle University as a post-doc
  
• Dr. Athanasios Grivas, PhD (2011-2016), working at Siemens as a R&D Software Engineer
  
• Dr. Graeme Coapes, PhD (2012-2015), working at Siemens as a R&D Software Engineer
  
• Dr. Ryan Jun Wen Luo, PhD (2011-2014), working at Newcastle University as a Postdoc